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Chapter 1
Wake-up event
When S3C2443X wakes up from the STOP Mode by an External Interrupt, an RTC
alarm interrupt and other interrupts, the PLL is turned on automatically. The initial-
state of S3C2443X after wake-up from the SLEEP Mode is almost the same as the
Power-On-Reset state except for the contents of the external DRAM is preserved. In
contrast, S3C2443X automatically recovers the previous working state after wake-
up from the STOP Mode. The following table shows the states of PLLs and internal
clocks after wake-ups from the power-saving modes.
Mode before wake-up
IDLE
STOP
PLL on/off after wake-up
Unchanged
PLL state ahead of entering STOP
mode (PLL ON or not)
SYSCLK after wake-up
and before the lock time
PLL output
PLL reference clock
SYSCLK after the lock
time by internal logic
PLL output
SYSCLK ahead of entering
STOP mode (PLL output or
not)
SLEEP
Off
PLL reference clock
PLL reference (input) clock
?
?
To enter sleep mode by BATT_FLT, BATF_CFG bits of PWRCFG register must be
configured.
Do not exit from sleep mode when BATT_FLT is LOW; SLEEP_CFG bit of PWRCFG
register must be configured.
A Battery Fault Signal (BATT_FLT#) is provided at the CPU to recognize the battery
state of the battery at the base board, which powers the module. Therefore this pin
is routed to the system connector. At the base board a comparator has to supervise
the battery state and the output of the comparator delivers the BATT_FLT# signal.
The figure below shows the power management state diagram:
Wake-up source
Wake-up source
Reset or restricted
wake-up events
21
ConnectCore 9M 2443 & Wi-9M 2443 Hardware Reference
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